![]() There's some really old traffic on the kernel mailing lists and comments in the kernel code that suggest that either it doesn't do interrupt steering in quite the same way as, for instance, Intel's APIC does, or if it does the kernel developers were having trouble making it work. This is why other OSes can't use the CMP system that these machines used: they're not programmed for it either because it's a huge undertaking that's not really worth it or Apple never made the relevant information public.Ĭlick to expand.Yeah, that's why I put the question mark in my reply. Because the primary processor had to manage the secondary, there was a small overhead incurred which resulted in an MP Mac only being about 60% faster than a similarly-clocked single-processor model. ![]() Because Apple designed their machines primarily to support the one processor and L2 cache, the second processor was thus unable to be accessed directly by the memory controller it had to be fed by the primary processor via specially-programmed applications. If I had to guess, I'd say they were developed in the same way as Motorola's bridge chips (such as the MPC105 and later MPC106) which shared similar limitations: they could either support two (or later up to four) 60x processors directly, or a single processor with a direct mapped board-level L2 cache. The primary limitation of these machines with their use of CMP instead of SMP is that the memory controller/PCI bridges Apple used were unable to directly interface with more than one processor. Because of the limitations of the 9500 it was based on, it too was only CMP. These used basically a mirror-image processor card that fit in a secondary slot with the original processor and the two were connected with a bridge cable.ĭaystar Digital actually worked with Apple in the development of the MP system that they both used, though Daystar was the only one to use more than two processors. Because it was based on the 9500, it operated in the same manner: a CMP system that required MP-aware software. It was designed to run A/UX or other *nix flavor and its MP system may have been implemented conventionally to allow proper SMP operation, but again I can't say for sure because I haven't really touched one.įor cloners, the only other one who really did MP was Umax and any of their sublicensees that used the Tsunami board. The ANS is a weird beast that I don't have too much experience with. The same is true for their followup machine, the 9600/200MP. Because of the weird hardware arrangement, OS X and Linux have no support for the second processor. It's a cooperative multitasking arrangement and requires programs to be specifically multiprocessor aware to take advantage of that second processor, which otherwise sits idle without the first processor explicitly feeding it instructions from those MP-aware programs. The first Mac with an MP setup was the 9500/180MP. I know it don't get us closer to solving this issue, but shows another pulseaudio behaviour.Somebody with more info is welcome to chime in, but this is what I've gathered from reading Apple Dev Notes and User Guides for Motorola chips: ![]() only happens if soundcard is imported on both parent and child processes, like the case if the line (4) is uncommented after the "fix" is made. So, the error mentioned by about Assertion 'o' failed. Aborting.īut if the lines commented with (1), (2), and (3) are moved inside the start method, the wire completely works. start)īy running python scwire.py the output is:Īssertion 's' failed at pulse/stream.c:1399, function pa_stream_connect_playback(). Import sys # list_devices() # (4) wire = Wire() default_speaker() # (3) return def start( self): #!/usr/bin/env python3 # -*- coding: utf-8 -*- # scwire.py import multiprocessing as mp import soundcard as sc # (1) class Wire:ĭef _init_( self, samplerate = 48000, blocksize = 240, channels =):
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